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09005aef806807ca MT9M413C36STC.fm - ver. 3.0 1/04 en 1 ?2004 micron technology, inc. all rights reserved. 1.3-megapixel cmos active-pixel digital image sensor 1.3-megapixel cmos active-pixel digital image sensor mt9m413 micron part number: MT9M413C36STC description the mi-mv13 is a 1,280h x 1,024v (1.3 megapixel) cmos digital image sensor capable of 500 frames-per- second (fps) operation. its truesnap? electronic shutter allows simultaneous exposure of the entire pixel array. available in color or monochrome, the sen- sor has on-chip 10-bit analog-to-digital converters (adcs), which are self-calib rating, and a fully digital interface. the chip's input clock rate is 66 mhz at approximately 500 fps, providing compatibility with many off-the-shelf interface components. the sensor has ten 10-bit-wide digital output ports. its open architecture design provides access to internal operations. adc timing and pixel-read control are integrated on-chip. at 60 fps, the sensor dissipates less than 150mw, and at 500 fps less than 500mw; it oper- ates on a 3.3v supply. pixel size is 12 microns square, and digital responsivity is 1,600 bits per lux-second. features/top level specifications array format: 1,280h x 1,024 v (1,310,720 pixels) pixel size and type: 12.0m x 12.0m truesnap (shuttered-node active pixel) sensor imaging area: h: 15.36mm, v: 12.29mm, diagonal: 19.67mm frame rate: 0?500+ fps @ (1,280 x 1,024), >10,000 fps with partial scan, [e.g. 0?4000 fps @ (1,280 x 128)] output data rate: 660 mb s (master clock 66 mhz, ~500 fps) power consumption: < 500 mw @ 500 fps; <150 mw @ 60 fps digital responsivity: monochrome: 1,600 bits per lux-second @ 550nm; adc reference @ 1v internal intra-scene dynamic range: 59db supply voltage: +3.3v operating temperature: -5c to +60c output: 10-bit digital through 10 parallel ports conversion gain = 13 v/e - color: monochrome or color rgb shutter: truesnap freeze-f rame electronic shutter shutter efficiency: >99.9% shutter exposure time: 2 s to > 33 msec adc: on-chip, 10-bit column-parallel package: 280-pin ceramic pga programmable controls: open architecture on-chip: adc controls output multiplexing adc calibration off-chip: window size and location frame rate and data rate shutter exposure time (integration time) adc reference
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 2 ?2004 micron technology, inc. all rights reserved. general the mi-mv13 is a 1280h x 1024v (1.31 megapixel) cmos digital image sensor capable of 500 frames-per- second (fps) operation. its truesnap? electronic shutter allows simultaneous exposure of the entire pixel array. available in color or monochrome, the sen- sor has on-chip 10-bit analog-to-digital converters (adcs), which are self-calib rating, and a fully digital interface. the chip?s input clock rate is 66 mhz at approximately 500 fps, providing compatibility with many off-the-shelf interfac e components as shown in figure 1. the sensor has ten (10) 10-bit-wide digital output ports. its open architecture design provides access to internal operations. adc timi ng and pixel-read control are integrated on-chip. at 60 fps, the sensor dissipates less than 150 mw, and at 500 fps less than 500 mw; it operates on a 3.3v supply. pixel size is 12 microns square and digital responsivity is 1600 bits per lux-sec- ond. the mi-mv13 cmos image sensor has an open architecture to provide access to its internal opera- tions. a complete camera system can be built by using the chip in conjunction with the following external devices: an fpga/cpld/asic controller, to manage the timing signals needed for sensor operation. a 20mm diagonal lens. biasing circuits and bypass capacitors. figure 1: a camera system usin g the mi-mv13 cmos image sensor controller (fpga, cpld, asic, etc.) system clock system interface off-chip adc pixel array (1280h x 1024v) adc bias +3.3v system clock control timing port 1 d0~d9 port 2 d10~d19 port 3 d20~d29 port 4 d30~d39 port 5 d40~d49 port 6 d50~d59 port 7 d60~d69 port 8 d70~d79 port 9 d80~d89 port 10 d90~d99 memory on-chip control on-chip
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 3 ?2004 micron technology, inc. all rights reserved. figure 2: sensor archit ecture (not to scale) figure 3: signal path diagram bottom adcs top adcs pixel array memory sense amps digital control photo detector pixel memory sample & hold adc per column processing pixel dac adc calibration offset (vref3-vclamp3)/20 bias vln2 to adc registers bias vln1 bias vlp vref1 vref4 vref2 7 10 ? buffer vrst_pix pg_n tx_n
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 4 ?2004 micron technology, inc. all rights reserved. figure 4: functional block diagram pixel array row driver row decoder row row timing block logicrst rowstrt rowdone 1280 x 10 sram adc register sample data shift / read 1280 x 10 sram output register column decoder s/h adc #1 adc #2 10 adc #1280 ... sram read control 10 x 10 shift sense amps tx_n pg_n output ports pads
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 5 ?2004 micron technology, inc. all rights reserved. external control sequence the mi-mv13 includes on-chip timing and control circuitry to control most of the pixel, adc, and output multiplexing operations. however, the sensor still requires a controller (fpga, cpld, asic, etc.) to guide it through the full sequence of its operation. with the truesnap freeze-frame electronic shutter signal charges are in tegrated in all pixels in parallel. the charges are then sampled into pixel analog memo- ries (one memory per pixel) and subsequently, row by row, are digitized and read out of the sensor. the inte- gration of photosignal is controlled by two control sig- nals: pg_n and tx_n. to clear pixels and start new integration, pg_n is made low. to transfer the data into pixel memory, tx_n is made low. the time differ- ence between the two procedur es is the exposure time. it should be noted that neither the pg_n or tx_n pulses clear the pixel analog memory. pixel memory can be cleared during the previous readout (i.e., the readout process resets the pixel analog memory), or by applying pg_n and tx_n together (i.e., clearing both pixel and pixel memory at the same time). with the truesnap freeze-frame electronic shutter the sensor can operate in either simultaneous or sequential mode in which it generates continuous video output. in simultaneous mode, as a series of frames are being captured, the pg_n and tx_n signals are exercised while the previous frame is being read out of the sensor. in simultaneous mode typically the end of integration occurs in the last row of the frame (row #1023) or in the last row of the window of interest. the position of the start integration is then calculated from the desired integration time. in sequential mode the pg_n and tx_n signals are exercised to control the integration time, and then digitization and readout of the frame takes place. alternatively, the sensor can run in single frame or snapshot mode in which one image is captured. the sensor has a column-parallel adc architecture that allows the array of 1,280 analog-to-digital convert- ers on the chip to digitize simultaneously the analog data from an entire pixel row. the following input sig- nals are utilized to control the conversion and readout process: the 10-bit row_addr (row address) input bus selects the pixel row to be read for each readout cycle. the row_strt_n signal starts the process of reading the analog data from the pi xel row, the analog-to-digi- tal conversion, and the storage of the digital values in the adc registers. when these actions are completed, the sensor sends a response back to the system con- troller using the row_done_n. row address must be valid for the first half of the row processing time (the period between row_start_n and row_done_n). the mi-mv13 contains a pipeline style memory array, which is used to store the data after digitization. this memory also allows the data from the previous row conversion cycle to be read while a new conver- sion is taking place. the digital readout is controlled by lowering the ld_shft_n signal, followed by the data_read_en_n signal. ld_shft_n transfers the digitized data from the adc register to the output reg- ister. data_read_en_n is used to enable the data output from the output register. a new pixel row read- out and conversion cycle can be started two clock cycles after data_read_en_n is pulled low. the out- put register allows the reading of the digital data from the previous row to be performed at the same time as a new conversion (pipeline mode). this means that the total row time will be only that between when: (a) the row_strt_n signal is ap plied and row_done_n is returned; and (b) ld_shft_n and data_read_en_n are applied plus two clock cycles. the pipelined opera- tion means there will always be 1 row of latency at the start of sensor operation. the alternative to pipelined operation is burst data operation in which a new pixel row conversion is not initiated until after the output register is emptied (and ld_shft_n has been taken high). the ratio of line active and blanking times can be adjusted to easily match a variety of display and collection formats. see ?timing diagram for one row? on page 7. table 1: conversion and readout process signal name description input bus width row_addr row address 10-bit row_strt_n row start 1-bit ld_shft_n load shift register 1-bit data_read_en_n data read enable 1-bit
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 6 ?2004 micron technology, inc. all rights reserved. figure 5: example 1 - row 4 of the mi-mv13 being digitized pg_n and tx_n to start integration, the pg_n signal simultaneously resets the photodetectors for the entire pixel array. to end integration, the tx_n signal simultaneously trans- fers charge from photodetector to memory inside each pixel for the entire pixel array. in sequential mode the pg_n and the tx_n pulses must have a minimum duration of 64 sysclk cycles. in simultaneous mode the pg_n and tx_n pulses must have a duration of 64 sysclk cycles and be applied in the window between the 66th and 129th sysclk cycles. additionally, in simultaneous mode between exposures a single sysclk duration pulse must be applied each row dur- ing the 130th clock cycle. row_addr the address for the pixel row to be read is input externally via this 10-bit in put bus. must be valid for at least 66 sysclk cycles, must be valid when row_strt_n is pulled low. row_strt_n this signal reads the contents of the pixel row speci- fied by row_addr, converts the pixel row signal to digital value, and stores the digital value in adc regis- ter (1280 x 10-bit). this process is completed in 128-129 1 sysclk cycles. must be valid for a minimum of two clock cycles and a maximum of 100 clock cycles. row_done_n 128-129 1 sysclk cycles after row_strt_n has been pulled low the sensor acknowledges the comple- tion of a row read operation/digitization by sending out a low going pulse on this pin. valid for two clock cycles. pixel array even columns odd columns sysclk column parallel 10 -b it adc 640 x 1 column parallel 10 -b it adc 640 x 1 control logic/ decoders adc control s adc control s row_strt_n row_addr 0 0 0 0 0 0 0 1 0 0 1. reads the contents of pixel row specified by row_addr 2. converts pixel row signals to digital values 3. stores digital values in adc register (1280 x 10 bit) controller row 4 pixel array even columns odd columns sysclk column parallel 10 -b it adc 640 x 1 column parallel 10 -b it adc 640 x 1 control logic/ decoders adc control s adc control s row_strt_n row_addr ld_shft_n 0 0 0 0 0 0 0 1 0 0 1. reads the contents of pixel row specified by row_addr 2. converts pixel row signals to digital values 3. stores digital values in adc register (1280 x 10 bit) controller row 4 1. in order to minimize the sensor power con- sumption, the row processing circuitry operates at sysclk/2. therefore, depend- ing on the user?s implementation, there will be either 128 or 129 sysclk cycles between the start of row_strt_n and row_done_n.
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 7 ?2004 micron technology, inc. all rights reserved. ld_shft_n this signal transfers the digitized data from the adc register to the output register (1280 x 10-bit) and gates the power to the sense amplifiers. the first data (col- umns 1-10) are available for output at the third rising edge of sysclk after ld_shft_n is pulled low. may be enabled simultaneously with or after the falling edge of row_done_n. must remain low the entire time the data is being read out. data_read_en_n this signal is used to enable the data output from the output register (1280 x 10-bit) to the ten, 10-bit output ports. may be initiated simultaneously with or after ld_shft_n is selected. minimum width is one clock cycle. output register the use of an output register allows the processing of a row to be performed while the digital data from the previous operation is being read out of the sensor. a new pixel readout and conversion cycle can be started two clock cycles after data_read_en_n is pulled low. figure 6: timing diagram for one row table 2: pixel array clk 1 clk 2 ? clk128 port 1 col. 1 col. 11 ? col. 1271 port 2 col. 2 col. 12 ? col. 1272 port 3 col. 3 col. 13 ? col. 1273 port 4 col. 4 col. 14 ? col. 1274 port 5 col. 5 col. 15 ? col. 1275 port 6 col. 6 col. 16 ? col. 1276 port 7 col. 7 col. 17 ? col. 1277 port 8 col. 8 col. 18 ? col. 1278 port 9 col. 9 col. 19 ? col. 1279 port 10 col. 10 col. 20 ? col. 1280 row_addr [0:9] 0 1 129 131 67 row va li d xxx xxx row_strt_n sysclk row_done_n ld_s hft_n data_ read_ en_n data [0:99] 0 1 2 3 4 5 127 pg2 pg1 tx_n 1 -3 nsec skew 66 130 2 0 pg_n row_addr [0:9] 0 1 129 131 67 row va li d xxx xxx row_strt_n sysclk row_done_n ld_s hft_n data_ read_ en_n data [0:99] 0 1 2 3 4 5 127 pg2 pg1 tx_n 1 -3 nsec 66 130 2 0 pg_n
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 8 ?2004 micron technology, inc. all rights reserved. figure 7: frame timing the mi-mv13 contains spec ial self-calibrating cir- cuitry that enables it to reduce its own column-wise fixed-pattern noise. this calibration process consists of connecting a calibration signal (vref2) to each of the adc inputs, and estimating and storing these off- sets (7 bits) to subtract from subsequent samples. the typical i/o signal timing (initialization sequence) diagram (figure 8) shows the timing sequence to cali- brate the sensor. calibration occurs automatically after logic reset (lrst_n) but it can also be started by the user, by pulling cal_strt_n low. when calibration is finished, the sensor generates the active low cal_done_n. significant ambient temperature drift may justify recalibration. see figure 7 and figure 8. row_st rt_n row_done_n ld_shft_n data_read_en_n 1023 row_addr [0:9] data [0:99] 1022 0 1 2 0 row1023 row1022 row1021 row0 row1 row1023 1023 n n+1 row n-1 row n pg_n=pg1+pg2 pg2 pg1 exposure tim e (= 1023 ?n rows) tx_ n readout (one full frame)
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 9 ?2004 micron technology, inc. all rights reserved. figure 8: typical i/o signal timing (initialization sequence) cal_strt_n cal_strt_n is a two-clock cycle-wide active-low pulse that initiates the adc calibration sequence. the pulse must not be actuated for 1 microsecond after either power-up or removal of the sensor from a power-down state. users may find it easiest to cali- brate by means of the logic reset. cal_done_n cal_done_n is a two-clock cycle-wide active-low output pulse that is asserted when the adc calibration is complete. the device will automatically initiate a calibration sequence upon a logic reset. completion of this sequence, in cases where it is initiated by a reset, is still with the cal_done_n signal. this process is complete within 112 sysclk cycles of cal_strt_n. this process is complete within 112 sysclk cycles of lrst_n. lrst_n lrst_n is a two-clock cycle-wide active-low pulse that resets the digital logic. it puts all logic into a known state (all flip-flops are reset). this signal also initiates an adc calibration sequence. cal_done_n cal_strt_n sysclk cal_done_n lrst_n sysclk
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 10 ?2004 micron technology, inc. all rights reserved. electronic shutter the mi-mv13 is intended to be operated primarily with the truesnap freeze-frame electronic shutter, but is also capable of operating in electronic rolling shut- ter (ers) mode. with truesnap the shutter can be operated to generate contin uous video output (simul- taneous mode or sequential mode) or capture single images (single frame mode). when considering timing for the various shutter modes it is useful to keep in mind the functionality of pg_n and tx_n. when pg_n is low, the photodetector is shorted to a reset voltage source. when high, the switch is open. when tx_n is low, the photodetector is shorted to pixel memory. when high, they are discon- nected. please refer to the switches shown in the signal path diagram, figure 3 on page 3. the memory is also reset during readout. it occurs for the selected row in the middle of the 0-66 clock interval after application of row_strt_n (approximately clocks 20 through 40). truesnap simultaneous mode in simultaneous mode, as a series of frames are being captured, the pg_n and tx_n signals are exer- cised while the previous frame is being read out of the sensor. in simultaneous mode typically the ?end of integration? occurs in the last row of the frame (row #1023) or in the last row of the window of interest. the position of the ?start integration? is then calculated from the desired integration time. please note that pixel memory is cleared during readout process (figure 9). figure 9: typical example of truesnap simultaneous mode: exposure during readout truesnap sequential mode in sequential mode the pg_n and tx_n signals are exercised to control the integration time, and then dig- itization and readout of th e frame takes place. please note that pixel memory is cleared during readout pro- cess. the photodetector is reset when pg_n is low. raising pg_n starts integration and lowering tx_n while pg_n is still high ends integration by sampling the signal into memory. there must be at least one sysclk cycle after returning tx_n to the high state until pg_n is lowered (figure 10 on page 11). read row#0 read row#1023 exposure time read row# 0 read row#1023 readout time row_addr 1023 n pg_n tx_n 0 readout
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 11 ?2004 micron technology, inc. all rights reserved. figure 10: typical example of truesnap sequential mode: exposure following readout truesnap single frame the mi-mv13 can run in single frame or snap-shot mode in which one image is captured. in single frame mode integration must be preceded with a void frame read (selecting all addresses and applying row_strt_n) or pg_n and tx_n must be applied together (for a minimum of 10 sysclk cycles) to clear pixel and pixel memory. holding pg_n and tx_n low resets the photodioide (pg_n) and the analog memory which is shorted to the photodiode by the tx_n switch. to start integration both tx_n and pg_n are released. to end integration and sample the signal into memory tx_n is made low again for 10 clocks mini- mum, up to 64 clocks (see figure 6 on page 7). after tx_n is returned to the high state there must be a delay of >1 sysclk prior to lowering pg_n again to erase charge in the photodetector. figure 11: typical example of truesnap single frame mode ers mode this mode is enabled by pulling pg_n high and tx_n low. partial scan examples the mi-mv13 can be partially scanned by sub-sam- pling rows. the user may select which rows and how many rows to include in a partial scan. for example, with a 66-megahertz clock, a row time is approxi- mately 2 microseconds, resulting in the following pos- sibilities: 1 row in frame: 500,000 frames per second 2 rows in frame: 250,000 frames per second 10 rows in frame: 5 0,000 frames per second 100 rows in frame: 5,00 0 frames per second 256 rows in frame: 2,00 0 frames per second 512 rows in frame: 1,00 0 frames per second 1,024 rows in frame: 500 frames per second ...etc read row#0 read row#1023 readout time row_addr 1023 0 pg_n tx_n read row#0 read row#1023 readout exposure time exposure time time row_addr 1023 0 pg_n tx_n read row #0 r ead row #1023 exposure time readout ?sleep? state ?sleep? state time row_addr 1023 0 pg_n tx_n read row #0 r ead row #1023 exposure time readout ?sleep? state ?sleep? state table 3: pin description pin number(s) signal name function data [99:0] pixel data output bus th at is ten pixels (100 bits) wide. bit 0 is the lsb (least significant bit) of the lowest order pixel (see table 2, pixel array, on page 7). in the group of ten pixels being output, bit 9 is the msb (most significant bit). t13 data0 u14 data1 v15 data2 t14 data3 v16 data4
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 12 ?2004 micron technology, inc. all rights reserved. t15 data5 u16 data6 r14 data7 v18 data8 p15 data9 d14 data10 a16 data11 c16 data12 e13 data13 d15 data14 a18 data15 e14 data16 b18 data17 d17 data18 e16 data19 w11 data20 u10 data21 v11 data22 r11 data23 v12 data24 w13 data25 u12 data26 v13 data27 r12 data28 v14 data29 b11 data30 c12 data31 a12 data32 b12 data33 e11 data34 b13 data35 c14 data36 d13 data37 e12 data38 c15 data39 u6 data40 v7 data41 t8 data42 r9 data43 v8 data44 u8 data45 v9 data46 t9 data47 v10 data48 r10 data49 table 3: pin description (continued) pin number(s) signal name function
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 13 ?2004 micron technology, inc. all rights reserved. c8 data50 a7 data51 d9 data52 e9 data53 a8 data54 c10 data55 a9 data56 d10 data57 b10 data58 c11 data59 t4 data60 r6 data61 v3 data62 w3 data63 r7 data64 w4 data65 t6 data66 v5 data67 r8 data68 v6 data69 e6 data70 d5 data71 c5 data72 d6 data73 a3 data74 c6 data75 d7 data76 a5 data77 e8 data78 a6 data79 m5 data80 p2 data81 n3 data82 t1 data83 p3 data84 u1 data85 p4 data86 t2 data87 v1 data88 r4 data89 h5 data90 e3 data91 e2 data92 d1 data93 d3 data94 table 3: pin description (continued) pin number(s) signal name function
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 14 ?2004 micron technology, inc. all rights reserved. e4 data95 c2 data96 a1 data97 f5 data98 b2 data99 l3 cal_done_n a two-clock cycle-wide active -low pulse that indicates the adc has completed its calibration operation. l2 cal_strt_n starts the calibr ation process for th e adc. this is a two- clock cycle- wide active-low pulse. f1 dark_off_en_n a low input enables common mode dark offset to all pixels. the value of the offset is defined by vref3 and vclamp3. subtracts a fixed offset pre-adc. signal is pulled up on-chip. j4, n15, j16 vdd power supply for core digital circuitry. h3, h18, t18 dgnd ground for core digital circuitry. k2 ld_shft_n an active-low en velope signal that places the recently converted row of data into output register for out put, enables the sense amps and resets the column counter. j3 data_read_en_n an active-low envelope si gnal that enables th e column counter and causes the ten 10-bit output ports to be updated with data on the rising edge of the system clock. column counter skips data when this input is high. l1 lrst_n global lo gic reset function (asynchronous). active-low pulse. row_addr [9:0] 10-bit bus (0 to 1023, bottom to top) that controls which pixel row is being processed or read out. an asychronous (unclocked) digital input. bit 9 is the msb. g18 row_addr0 h16 row_addr1 h15 row_addr2 f18 row_addr3 g17 row_addr4 f17 row_addr5 e18 row_addr6 g15 row_addr7 f16 row_addr8 d18 row_addr9 l5 row_done_n a two-cycle-wide pulse that indicates that processing of the currently addressed row has been completed. k4 row_strt_n starts adc conversion of the pixel row (defined by the row address) content. a two-clock cycle-wide active-low pulse. h2 standby_n a low input sets the sensor in a low power mode. (allow 1 microsecond before calibrating, af ter coming out of this mode). signal is pulled up on-chip. j5 pixel_clk_out data synchronous output. user may prefer to use this pin as data clock instead of sysclk. g3 sysclk clock input for entire chip. maximum design frequency is 66 mhz (50%, 5%, duty cycle). table 3: pin description (continued) pin number(s) signal name function
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 15 ?2004 micron technology, inc. all rights reserved. g16, e10, c13, b4, b8, c7, f4, m2, b14, f15, r13, t12, b1, h4, n4, r3, t5, u5, w7, u9, u11, t16, b16 vdd_io power supply for digital pad ring. g5, d4, g4, k3, n5, p5, u4, t7, t10, u7, u13 k5, b15, b17, h17, d12, d11, e17, c9, d8 m4, t11,u18, b5,u15 dgnd_io digital grou nd for pad ring. r18, p18, k18,j18 vaa power supp ly for analog processing ci rcuitry (column buffers, adc, and support). t17, n16, l17, k17, j15, r17 agnd ground for analog sign al processing circuitry. l15 vln1 bias setting for pixel source fo llower operating current. impedance: 3k ? , 10pf. decoupling capacitors recommended. m18 vln2 the bias setting for the adc is generated on-chip. a decoupling capacitor to ground is recomme nded. external biasing may be preferable to optimize performance. impedance: 3k ? , 10pf. n17 vlp bias setting voltage for the column source follower operating current. impedance: 3k ? , 10pf. decoupling ca pacitor recommended. k16, m15 vref1 adc reference input voltag e that sets the maximum input signal level (defines the level where the ff code occurs) and thus sets the size of the least sign ificant bit (lsb) in th e analog to digital conversion process. a smaller vr ef1 produces a smaller lsb, which means a smaller analog si gnal level input is required to produce the same digital code out. likewise, a larger vref1 produces a larger lsb, which means a larger analog si gnal level input is required to produce the same digital code out. thus the reference value can be used like a global gain adjustment (halving this voltage doubles the gain). this signal has two pin connections to minimize internal losses during high-speed operation. user voltage source must supply a transient current of 100ma at a frequency of 500 khz with a 2% duty cycle. decoupling capacitors to agnd of ~1f (ceramic) and 100f (electrolytic) placed as clos e to the package pins as possible are usually sufficient to filter ou t this required current transient. p17 vref2 adc reference used for the ca libration operation. user voltage source must supply a transient cu rrent of 20ma at a frequency of 500 khz with a 2% duty cycle. a ceramic decoupling capacitor to agnd of ~0.1f is usually sufficient to filter out this required current transient. m16 vref3 dark offset cancellation positive input reference, tied to the pedestal voltage to be added to the signal. k15 vclamp3 dark offset cancellation ne gative input reference. user voltage source must supply a transient cu rrent of 40ma at a frequency of 500 khz with a 2% duty cycle. a ceramic decoupling capacitor to agnd of ~0.1f to 1f is usually suffic ient to filter out this required current transient. table 3: pin description (continued) pin number(s) signal name function
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 16 ?2004 micron technology, inc. all rights reserved. r16 vlp_drv should be connected to agnd. l4 tx_n this is an active low pulse th at controls transfer of charge from photodetector to memory inside ea ch pixel for entire pixel array. m3 pg_n this is an active low pulse that resets the photodetectors and thereby starts new integration cycle. l18, p16, j17 vrst_pix power supply for pixe l array. there is no noticeable dc power consumption by this pin (<100a). user voltage source must supply a transient current of 10ma at a frequency of 500 khz, once a frame. decoupling capacitors to agnd ~1f (ceramic) and 100f (electrolytic) are usually sufficient to filter out this required current transient. l16 vref4 adc referenc e input value should be 1/4 vref1. user voltage source must supply a transient current of 100ma at a frequency of 500 khz with a 2% duty cycle. a ceramic decoupling capacitor to agnd of ~0.1f is usually sufficient to filter out this required current transient. e5,c3,c1, d2, e1,f2, f3, g1, h1, j2, j1, k1, m1, n1, n2, p1,r1, r2, t3, u2, r5, u3, v2, w2, w1, v4, w5, w6, w8, w9, w10,w12, w14, w15, w17, w18, v17, r15, u17, v19, w19, u19, t19, r19, p19, n18, n19, m19, m17, l19, k19, j19, h19, g19, f19, e19, d19, c19, b19, c18, e15, c17, d16, a19, a17, a15, a14, a13, a11, a10, b9, b7, b6, a4, e7, a2, c4, b3, w16, g2 no connect. table 3: pin description (continued) pin number(s) signal name function
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 17 ?2004 micron technology, inc. all rights reserved. figure 12: board connections note: 1. it is recommended that 0.01 f and 0.1 f capacitors be placed as physically close as possible to the mi-mv13's package. 2. alternatively, the analog voltages depicted as bei ng generated from potentiomete rs could be supplied from dacs. 3. the analog voltages vln1, vln2, vlp, and vref4 are generated on-ch ip, but user may supply voltages to override the internal b iases. a nalog ground digital ground data0 t13 data1 u14 data2 v15 data3 t14 data4 v16 data5 t15 data6 u16 data7 r14 data8 v18 data9 p15 data10 d14 data11 a16 data12 c16 data13 e13 data14 d15 data15 a18 data16 e14 data17 b18 data18 d17 data19 e16 data20 w11 data21 u10 data22 v11 data23 r11 data24 v12 data25 w13 data26 u12 data27 v13 data28 r12 data29 v14 data30 b11 data31 c12 data32 a12 data33 b12 data34 e11 data35 b13 data36 c14 data37 d13 data38 e12 data39 c15 data40 u6 data41 v7 data42 t8 data43 r9 data44 v8 data45 u8 data46 v9 data47 t9 data48 v10 data49 r10 data50 c8 data51 a7 data52 d9 data53 e9 data54 a8 data55 c10 data56 a9 data57 d10 data58 b10 data59 c11 data60 t4 data61 r6 data62 v3 data63 w3 data64 r7 data65 w4 data66 t6 data67 v5 data68 r8 data69 v6 data70 e6 data71 d5 data72 c5 data73 d6 data74 a3 data75 c6 data76 d7 data77 a5 data78 e8 data79 a6 data80 m5 data81 p2 data82 n3 data83 t1 data84 p3 data85 u1 data86 p4 data87 t2 data88 v1 data89 r4 data90 h5 data91 e3 data92 e2 data93 d1 data94 d3 data95 e4 data96 c2 data97 a1 data98 f5 data99 b2 pixel data output g18 rowaddr0 h16 rowaddr1 h15 rowaddr2 f18 rowaddr3 g17 rowaddr4 f17 rowaddr5 e18 rowaddr6 g15 rowaddr7 f16 rowaddr8 d18 rowaddr9 g3 sysclk j3 data_read_en_n k2 ld_shft_n l3 cal_done_n l5 row_done_n l2 cal_strt_n k4 row_strt_n f1 dark_off_en_n h2 standby_n l1 lrst_n m3 pg_n l4 tx j5 pixel_clk_out vclamp3 vln1 vlp vref1 vref2 vln2 vlp_drv vrst_pix vref4 vref3 1k ? a nalog +3.3v 0.1 f 10 f 1k ? a nalog +3.3v 0.1 f 10 f 1k ? a nalog +3.3v 1 f 0.01 f 1k ? a nalog +3.3v 0.1 f 10 f 1k ? a nalog +3.3v 0.1 f 10 f 0.1 f 10 f a nalog +3.3v digital 3.3v g5 dgnd_io d4 dgnd_io g4 dgnd_io k3 dgnd_io n5 dgnd_io p5 dgnd_io u4 dgnd_io t7 dgnd_io t10 dgnd_io u7 dgnd_io u13 dgnd_io u15 dgnd_io k5 dgnd_io b15 dgnd_io b17 dgnd_io h17 dgnc_io d12 dgnd_io d11 dgnd_io c9 dgnd_io d8 dgnd_io m4 dgnd_io t11 dgnd_io u18 dgnd_io e17 dgnd_io b5 dgnd_io h3 dgnd h18 dgnd t18 dgnd t17 agnd n16 agnd k17 agnd r17 agnd l17 agnd j15 agnd a nalo g ground digital ground _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ _______ _ ____ _ _______ _ ____ _ _______ _ ____ _ _______ _ ____ _ _______ _ _______ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ _____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ _ ____ r18 p18 k18 j18 j4 n15 j16 m2 b14 f15 r13 t12 b1 h4 n4 r3 t5 u5 w7 u9 u11 t16 g16 b16 e10 c13 b4 b8 c7 f4 vaa vaa vaa vaa vdd vdd vdd vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io vdd_io controller interface a n a l og + 3 . 3 v 1 f 100 f a nalog +3.3v 0.1 f 10 f 1k ? 1k ? 0 , 01 f 0.01 f 100 f 0.01 f 10 f 0.1 f0.01 f
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 18 ?2004 micron technology, inc. all rights reserved. electrical specifications table 4: ac electrical characteristics (vsupply = 3.3v 0.3v) symbol characteristic condition min. typ. max. unit tplh data output propagation delay for low to high trans. 123ns tphl data output propagation delay for high to low trans. 123ns tsetup setup time for input to sysclk vin = vpwr or vgnd 34 ns thold hold time for input to sysclk vpwr=min,voh min 34 ns table 5: dc electrical characteristics (vsupply = 3.3v 0.3v) symbol characteristic condition min. typ. max. unit vlp bias for column buffers 0.5 1.9 2.7 v vref1 reference for adc 0.2 1.0 1.5 v vref2 reference for adc calibration 0.3 0.8 1.5 v vref3 dark offset 0 0.6 2.5 v vln1 bias for pixel source follower 0.8 1.0 1.1 v vln2 bias for adc 0.8 1.0 1.1 v vclamp3 dark offset 0 0 3.0 v vlp_drv row driver control grounded 0 0 0 v vrst_pix pixel array power 2.2 2.7 2.9 v vref4 reference for adc 0.25 v vih input high voltage 2.0 vpwr+0.3 v vil input low voltage -0.3 0.8 v iin input leakage current, no pullup resistor vin = vpwr or vgnd -5 5 a voh output high voltage vpwr=min, ioh=- 100a vpwr-0.2 v vol output low voltage vpwr=min, iol=100a 0.2 v ipwr 1 maximum supply current 66 mhz clock, 5pf load on outputs 165 ma note: 1. ipwr = i (vdd_io) + i (vdd) + i (vaa)
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 19 ?2004 micron technology, inc. all rights reserved. note: vpwr = vdd = vaa = vdd_io (vdd is supply to digital circui t, vaa to analog circuit). vg nd = dgnd = agnd (dgnd is the ground to the digital circuit, agnd to the analog circuit). note: this device contains circuitry to protect the inputs against damage from high static voltag es or electric fields, but the user is advised to take precaution s to avoid the application of any vo ltage higher than the maximum rated. table 6: absolute maximum ratings symbol parameter value unit vpwr dc supply vo ltage -0.5 to 3.6 v vin dc input voltage -0.5 to vpwr + 0.5 v vout dc output voltage -0.5 to vpwr + 0.5 v i dc current drain per pin (any i/o) 50 ma i dc current drain, vpwr and vgnd 100 ma table 7: recommended operating conditions symbol parameter min. max. unit vpower dc supply voltage 3.00 3.6 v t a commercial operating temperature -5 60 c table 8: power dissipation (vpwr = 3.3v; t a = 25c @500 fps) symbol parameter min. typ. max. unit pavg average power 250 350 500 mw
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 20 ?2004 micron technology, inc. all rights reserved. analog voltage setting considerations the values suggested in the typical values column in the ?ac electrical characteristics? on page 18 should be the starting point for setting the analog voltages. additionally, it is useful to refer to the ?signal path dia- gram? on page 3 that indicates how the analog voltages affect the image. other cons iderations are as follows: vref1 this adc reference voltage can also be utilized as a gain. a lower value will increase gain, but also results in amplificatio n of nonuniformities. vref4: should always be set to ? of vref1. vref2 reference used for the adc calibration to remove column-wise fpn. if set much lower than the typical value there is a possibility that some column nonuniformities will not be corrected. setting higher than typical will result in more column-wise fpn. when debugging analog voltage settings it may be use- ful to temporarily set vref2 to zero, effectively stop- ping the adc calibration process and adjusting the vln/vlp settings. vln1 the on-chip generated voltage should be used as the starting point; increasing above typical will result in an increase in current, speed, and fpn in the first buffer. vln2 the on-chip generated voltage should be used as the starting point. controls the current in the adc comparators (there is a safe range where this voltage has no effect); above or below this range will cause the comparators to fail. if vertical white stripes appear in the center of the imaging area or random white spots appear in contour areas, it is an indication that vln2 needs to be adjusted. vlp the on-chip generated voltage should be used as the starting point. vrst_pix voltage for pixel reset. if this is too close to vaa the image will be degraded and is not recom- mended to be above 2.9v, but if it is set too low the pixel dynamic range may decrease. in the initial pre- production version of the mi-mv13 the number of defects increased with reduced vrst_pix so it was rec- ommended to keep this as high as possible. if high vrst_pix resulted in vertical fpn it was compensated via adjustments to vln1 and vln2. vref3 and vclamp3 these control the offset as shown in the ?signal path diagram? on page 3. this must be enabled via dark_off_en_n; offset is ~ (vref3-vclamp3)/20. figure 13: set up and hold time figure 14: clock to data propagation delay t setup t hold sysclk input tplh, tphl sysclk dout (99:0) tr
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 21 ?2004 micron technology, inc. all rights reserved. figure 15: pixel array layout figure 16: bayer pattern (p ixel color pattern detail) megapixel (1280h x 1024v) 1280 x 1024 active p ixels area of detail below (0,0) ( 1023 , 1279 ) no black rows r b r g g b g b g g g r r b r g g b g b g g g r r r g g g r (0,0 ) ? ? b g b g g
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 22 ?2004 micron technology, inc. all rights reserved. optical specification table 9: image sensor characteristics t a = 25c symbol parameter ty p unit r i responsivity (adc vr ef=1v) 1600 lsb/lux-sec. nsat pixel saturation level 63,000 e - nadc dc noise + dnl 2 lsb p-p dsnu, hf 1 dark signal non-uniformity, hi gh spatial frequency <0.4 % rms dsnu, lf 2 dark signal non-uniformity, lo w spatial frequency <1.5 % p-p vdrk output referred dark signal 50 mv/sec ne input referred noise 70 e - dyn_i internal dynamic range 59 db prnu, hf 1 photo response non-uniformity, high spatial frequency <0.6 % rms prnu, lf 2 photo response non-uniformity, low spatial frequency <10 % p-p kdrk dark current temperature coefficient 100 %/8c note: 1. calculation method for high frequency prnu and dsnu: for prnu, uniformly adjust illumination so that the averag e voltage across a sensor partition is full scale/2. for dsnu, block illumination to sensor. integration time = 2ms. calculate spatially-filtered average using 64 pixel square window. calculate r.m.s. difference between pixel values and correspond ing filtered average values. calculate average r.m.s. between windows. 2. calculation method for low frequency prnu and dsnu: for prnu, uniformly adjust illumination so that the averag e voltage across a sensor partition is full scale/2. for dsnu, block illumination to sensor. integration time = 2ms calculate spatially-filtered average using 64 pixel square window calculate difference between the center pixel value and corresponding filtered average values. report peak to peak values between windows. table 10: pixel array specifications symbol parameter typ. unit resolution number of pixels in active image 1280 x 1024 pixels pixel size x-y dimensions 12 x 12 m pixel pitch center-to-cen ter pixel spacing 12 m pixel fill factor area of drawn active area 40 %
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 23 ?2004 micron technology, inc. all rights reserved. figure 17: quantum efficiency quantum effficiency for color 0 5 10 15 20 25 400 500 600 700 800 900 1000 wavelength (nm) quantum efficiency (% green 1 pixels green 2 pixels blue pixels red pixels quantum effficiency for monochrome 0 5 10 15 20 25 30 400 500 600 700 800 900 1000 wavelength (nm) quantum efficiency (%
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 24 ?2004 micron technology, inc. all rights reserved. lens selection much of the specific information in this section is explained in detail at http://www.micron.com/prod- ucts/imaging/technology/inde x.html on our web site. the following information applies specifically to the mi-mv13 megapixel image sensor. format the diagonal of the image sensor array, 19.67mm, fits most closely, but not exactly, within the optical for- mat corresponding to the 1-inch specification. some 1-inch optical format lenses have been shown to work well with this sensor. typical 1-inch lens examples are computer v2513, v5013, and v7514. f-mount lenses provide another possible lens solution due to their large image circle. mounting several lens mounting standards exist that specify the threading of the lens' barrel as well as the distance the back flange of the lens should be from the image sensor for the lens to properly form an image. typical lens mounting standards for the mi-mv13 are: another option is to use a c-mount together with a c-to f-mount adapter for greater lens flexibility. field of view and focal length the field of view of an imaging system will depend on both the focal length of the imaging lens and the width of the image sensor. as most of the image infor- mation humans pay attention to generally falls within a 45-degree horizontal field of view, many camera sys- tems attempt to imitate this field of view. however, in some cases a telephoto system (with a narrow field of view, say less than 20 degrees), or a wide angle system (with a wide field of view, say more than 60 degrees) may be desired. the approximate field of view that an imaging system can achieve is shown in the following equation: where is the field of view, tan -1 is the trigonometric function arc-tangent, w is the width of the image sen- sor, and f is the focal length of the imaging lens. for example, the imaging system 's diagonal field of view can be determined by using the diagonal of the image sensor (19.67 mm) for w and a particular lens' focal length for f. alternatively, the imaging system's hori- zontal field of view can be determined by using the horizontal of the image sensor (15.36 mm) for w and a particular lens' focal length for f. a lens with an approximately 50 mm focal length will provide an 18- degree horizontal field of view with a mi-mv13 (keep in mind that the above equation is a simplified approx- imation). f-number the f-number, or f-stop, of an imaging lens is the ratio of the lens' focal length to its open aperture diameter. every doubling in f-number reduces the light to the sensor by a factor of four. for example, a lens set at f/1.4 lets in four times more light than that same lens when it is set at f/2.8. low f-number lenses capture a lot of light for delivery to the image sensor, but also require careful focus. higher f-number lenses capture less light for delivery to the image sensor, and do not require as much effort to bring the imaging sys- tem to focus. low f-number lenses generally cost more than high f-number lenses of similar overall perfor- mance. typical f-numbers for various imaging systems are: mtf modulation transfer function (mtf) is a technical term that quantifies how well a particular system prop- agates information. for cameras, the ?system? is the table 11: lens moun ting standards mount mounting name threads back-flange-to-image- sensor c 1 - 32 17.526 mm cs 1 - 32 12.5 mm table 12: typical f-numbers f-stop imaging application 1.4 low-light level imaging, manual focus systems 2.0 typical for pc and other small form cameras 2.8 common in digital still cameras 4.0+ often used in machine vision applications 2 -1 w 2 f ---- - ?? ?? tan
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 25 ?2004 micron technology, inc. all rights reserved. lens and the sensor, and the "information" is the pic- ture they are capturing. mtf ranges from zero (no information gets through) to 100 (all information gets through), and is always specified in terms of informa- tion density. in most imaging systems, the mtf is lim- ited by the performance of the imaging lens. a lens must be able to transfer enough information to the image sensor to be able to resolve details in the image that are as small as the pixe ls in the image sensor. the pixels are set on a 12-micron pitch (the center of one pixel is 12 microns from the center of its neighboring pixel). thus, a lens used should be able to resolve image features as sm all as 12 microns. typically, a lens' mtf is plotted as a function of the number of line pairs per millimeter the lens is attempting to resolve (more line pairs per millimeter mean higher information densities). for an electronic imaging system, one line pair will correspond to two image sensor pixels (each pixel can resolve one line). this is equated as: where lp/mm means line pairs per millimeter and z is the image sensor's pixel pitch, in millimeters. for the mi-mv13, z = 0.012 mm, such that the mi-mv13 has 42 lp/mm. thus, a lens should provide an acceptable level of mtf all the way out to 42 lp/mm. for most lenses, the mtf will be highest in the center of the images they form, and gradually drop off toward the edges of the images they form. as well, mtfs at low values of lp/mm will generally be larger than mtfs at high values of lp/mm. one of the many trade-offs that must be decided by the end user is how high the mtf needs to be for a particular imaging situation. gener- ally, near an image sensor's lp/mm good mtfs are higher than 40, moderate mtfs are from 20 to 40, and poor mtfs are less than 20. infrared cut-off filters in most visible imaging situations it is necessary to include a filter in the imaging path that blocks infrared (ir) light from reaching the image sensor. this filter is called an ir cut-off filter. various forms of ir cut-off fil- ters are available, some ab sorptive (like hoya's cm500 or schott's bg18) and some reflective (i.e., dielectric stacks). infrared light pose s a problem to visible imag- ing because its presence blurs and decreases the mtf in the images formed by a lens. since human vision only extends across a narrow range of the electromag- netic spectrum, camera systems hoping to capture images that look like the images our eyes capture must not capture light outside of our vision range. silicon- based light detectors (like the ones in the mi-mv13's pixels) detect light from the very deep blue to the near infrared. thus, a filter must exist in the light's path that keeps the infrared from reaching the image sensor's pixels. in most cases, it is important that such a filter begin blocking light around 650 nm (in the deep red) and continue blocking it until at least 1100 nm (in the near ir). in most camera systems, the ir cut-off filter is included in the imaging lens. however, this point must be verified by a lens vendor when a particular lens is chosen for use with an image sensor. lp mm -------- - 1 2 z ----- =
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 26 ?2004 micron technology, inc. all rights reserved. figure 18: c-mount lens sh roud for mi-mv13 and socket note: this shroud is designed to accommodate the mi-mv13 when it is inserted into a pga socket. these dimensions are based on the mill max #510-93-281-19-081003 socket (www.mill-max.com). 2.50 ? 0. 2 5 ? 0.25? 2.50? 1.25? 0.0 0.0 0.25? 0.12 5 0.125? 0.12 5 2.50? 0.75? 0.015? recess 2.50? 1-32 thread 2.50 ? 1.25 base threaded holes for 4-40 screws (4 places) lid holes dia = 0.12? (for 4-40 screws), 4 places no thread
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 27 ?2004 micron technology, inc. all rights reserved. figure 19: 280-pin ceramic pga package to p vi e w notes: 1. sensor is centered on package, pixel array is off-center. 2. die offset is 10 mils in both the x and y directions. 3. die rotation is 2 degrees. (1023, 1279) (0, 0) 19mils 1.0670.012 0.8400.009 0.8400.008 index 0.782 0.743 1.9000.018 1.3430.016 1.106 0.012 0.003 0.003 row r o w column c o l u m n
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 28 ?2004 micron technology, inc. all rights reserved. figure 20: 280-pin ceramic pga package side view (0.0235 x 2) 0.047 0.005 0.039 0.005 u nits: inches n otes: 1 . die thickness 28.5 mils 1 mil. 2 . die epoxy thickness 1 mil. 3 . d-263 glass lid thickness 31 2 mils. 4 . glass lid epoxy thickness 1 mil. glass lid 0.118 0.012 0.012 0.002 0.020 0.002 0.047 0.005 (4x) 0.018 0.002 (281x) r0.005 braze (0.008) 0.150 0.008 0.039 0.004 0.007 (at ceramic) die
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 29 ?2004 micron technology, inc. all rights reserved. figure 21: 280-pin ceramic pga package bottom view 1.800 0.012 (p = 0.100 x 18) alumina coat (281x) 0. 067 typ. dia. extra pin 0.100 typ. w v u t r p n m l k j h g f e d c b a 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1.3-megapixel cmos active-pixel digital image sensor 09005aef806807ca micron technology, inc., reserves the right to change products or specifications without notice. MT9M413C36STC.fm - ver. 3.0 1/04 en 30 ?2004 micron technology, inc. all rights reserved. ? 8000 s. federal way, p.o. box 6, boise, id 83707-0006, tel: 208-368-3900 e-mail: prodmktg@micron.com, internet: http://www .micron.com, customer comment line: 800-932-4992 micron, the m logo, the micron logo, and truesnap are trademarks of micron technology, inc. all other trademarks are the property of their respective owners. environmental document history table 13: absolute maximum ratings symbol parameter value unit t storage storage temperature range -40 to 125 c t lead lead temperature (10 second soldering) 235 max. c table 14: document change history change date changed by comments ver. 3.0 initial release ver. 3.0 1/7/04 ejakl 1. page 1, added additional bullet un der features/top le vel specifications: conversion gain = 13 v/e - 2. page 11, added ?for 10 cloc ks minimum, up to 64 clocks (see figure 6, page 7)? line 12 in paragraph titled truesnap single frame. 3. page 15, added ?(halving this voltage doubles the gain)? under function, for pin numbers k16, m15. 4. page 20, updated figure 13.

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